David J. Lilja

TL;DR: The MinneSPEC inputset for the SPEC CPU 2000 benchmark suite is developed to facilitate efficient simulations with a range of benchmarkprograms and it is found that for some programs, the Minne SPECprofiles match the SPEC reference dataset program behavior very closely; for other programs, however, theMinneSPEC inputs produce significantly different programbehavior.

TL;DR: The concept of stochastic logic is applied to a reconfigurable architecture that implements processing operations on a datapath and it is found to be much more tolerant of soft errors than conventional hardware implementations.

TL;DR: Measuring Computer Performance as mentioned in this paper describes the fundamental techniques used in analyzing and understanding the performance of computer systems and provides a detailed explanation of the key statistical tools needed to interpret measured performance data, and describes the general "design of experiments" technique, and shows how the maximum amount of information can be obtained for the minimum effort.

TL;DR: To be effective, prefetching must be implemented in such a way that prefetches are timely, useful, and introduce little overhead, and secondary effects such as cache pollution and increased memory bandwidth requirements must be taken into consideration.

TL;DR: This paper introduces new SCEs based on finite-state machines based on FSMs for the task of digital image processing and compares the error tolerance, hardware area, and latency of stochastic implementations to those of conventional deterministic implementations using binary radix encoding.