A general theory of phase noise in electrical oscillators

TLDR: In this paper, a general model is introduced which is capable of making accurate, quantitative predictions about the phase noise of different types of electrical oscillators by acknowledging the true periodically time-varying nature of all oscillators.

Abstract: A general model is introduced which is capable of making accurate, quantitative predictions about the phase noise of different types of electrical oscillators by acknowledging the true periodically time-varying nature of all oscillators. This new approach also elucidates several previously unknown design criteria for reducing close-in phase noise by identifying the mechanisms by which intrinsic device noise and external noise sources contribute to the total phase noise. In particular, it explains the details of how 1/f noise in a device upconverts into close-in phase noise and identifies methods to suppress this upconversion. The theory also naturally accommodates cyclostationary noise sources, leading to additional important design insights. The model reduces to previously available phase noise models as special cases. Excellent agreement among theory, simulations, and measurements is observed.

Figures

Fig. 19. Four-stage differential ring oscillator.

Fig. 20. Measured sideband power versus injected current atfm = 100 kHz, f0+fm = 5:5 MHz, 2f0+fm = 10:9 MHz, 3f0+fm = 16:3 MHz.

Fig. 2. A typical RLC oscillator.

Fig. 18. Simulated and predicted sideband power for low frequency injection versus PMOS to NMOSW=L ratio.

Fig. 11. Conversion of noise to phase fluctuations and phase-noise sidebands.

Fig. 12. (a) PSD of (t) and (b) single sideband phase noise power spectrum,Lf !g.

Frequently asked questions

Q1. What are the contributions mentioned in the paper "A general theory of phase noise in electrical oscillators - solid-state circuits, ieee journal of" ?

In this paper, a general model for phase noise is proposed, which is capable of making accurate, quantitative predictions about the phase noise of different types of electrical oscillators by acknowledging the true periodically time-varying nature of all oscillators. 

Q2. How does the sinusoidal current in the differential output work?

A sinusoidal current of 100 A at 50 MHz injected at the drain node of one of the buffer stages results in two equal sidebands, 46 dB below carrier, in the power spectrum of the differential output. 

Q3. Why is the asymmetry due to the voltage dependent conductance of the load?

Since the asymmetry is due to the voltage dependent conductance of the load, reduction of the upconversion might be achieved through the use of a perfectly linear resistive load, because the rising and falling behavior is governed by an RC time constant and makes the individual waveforms more symmetrical. 

Q4. What is the reason for the noise in a practical oscillator?

One important reason is that much of the noise in a practical oscillator arises from periodically varying processes and is therefore cyclostationary. 

Q5. What is the LTI assumption for tuned tank oscillators?

The semi-empirical model proposed in [1]–[3], known also as the Leeson–Cutler phase noise model, is based on an LTI assumption for tuned tank oscillators. 

Q6. What is the generalized approach to phase noise in the oscillators?

Note that the generalized approach presented here is capable of calculating the fitting parameters used in (3), ( and ) in terms ofcoefficients of ISF and device noise corner, .Several design implications emerge from (18), (21), and (24) that offer important insight for reduction of phase noise in the oscillators. 

Q7. What is the effect of the noise current power on the phase noise in the region of the spectrum?

Using the above effective noise current power, the phase noise in the region of the spectrum can be calculated as(6)Note that the factor of 1/2 arises from neglecting the contribution of amplitude noise. 

Q8. What is the effect of the impulse on the amplitude of the capacitor?

In particular, if the impulse is applied at the peak of the voltage across the capacitor, there will be no phase shift and only an amplitude change will result, as shown in Fig. 4(a). 

Q9. What was the first observation that reduced the effect of supply noise on timing jitter?

It was first observed in the context of supply noise rejection [15], [16] that using more linear loads can reduce the effect of supply noise on timing jitter. 

Q10. What is the phase noise corner due to internal noise sources?

As can be seen, the phase noise corner due to internal noise sources is not equal to the device noise corner, but is smaller by a factor equal to .