Methods for evaluating and covering the design space during early design development

TLDR: This review eases the choice of a decent exploration policy by providing a comprehensive survey and classification of recent related work focused on system-on-a-chip designs, particularly those used for network processors.

About: This article is published in Integration.The article was published on 2004-12-01 and is currently open access. It has received 317 citations till now. The article focuses on the topics: Design space exploration & Systems design.

Figures

Figure 7: Subdividing the design space into independent parts for optimization.

Figure 1: Y-Chart approach to design space exploration.

Figure 6: Common approaches for subsampling the design space.

Figure 3: Two-dimensional design space with Pareto-optimal designs 1, 4, 5, and 6.

Table 1: Feature comparison of design space exploration tools.

Figure 5: Common approaches for covering the design space. A discrete, two-dimensional design space defined by two design parameters/ constraints P1 and P2 is shown.

Frequently asked questions

Q1. What have the authors contributed in "Methods for evaluating and covering the design space during early design development" ?

This paper gives an overview of methods used for Design Space Exploration ( DSE ) at the systemand micro-architecture levels. The designer has to balance the following issues: the accuracy of the evaluation, the time it takes to evaluate one design point ( including the implementation of the evaluation model ), the precision/granularity of the design space coverage, and last but not least the possibilities for automating the exploration process. The authors also list common representations of the design space and compare current system and micro-architecture level design frameworks. This review thus eases the choice of a decent exploration policy by providing a comprehensive survey and classification of recent related work. 

Q2. What are some of the metrics that are used to determine the speed of a memory subsystem?

Memory-specific metrics: Cache characteristics that in particular represent the speed of the memory subsystem for a given application include the number of conflict and capacity misses,cache hit and miss ratios, as well as the locality of accesses extracted from the application. 

Q3. How did the designer generate a delay-area tradeoff curve?

By extensively playing around with synthesis constraints, designer have been able to generate a delay-area tradeoff curve in the design space defined by speed and area costs. 

Q4. What are the methods for evaluating a single design?

Methods for evaluating a single design range from purely analytical methods, which can be processed symbolically, to cycle-accurate and RTL-level simulations which need complex executable models of the design under evaluation. 

Q5. What are examples of design systems and case studies based on exhaustive search?

Examples of design systems and case studies based on exhaustive search include system-level simulation [39, 6, 125], high-level synthesis [11, 13, 22, 4, 26, 111, 103], ADL-driven approaches [80, 91], cycle-accurate simulations [57, 48], instruction set simulators [36], code parallelization and partitioning onto multi-processors [54], trace-based analysis [64], and last but not least static analysis [40]. 

Q6. What kind of models of computation can Metropolis express?

Metropolis’ [9] metamodel language also allows to express different kinds of models of computation, such as transaction-level modeling and process networks. 

Q7. How can existing instruction set simulators be integrated?

Existing instruction set simulators can be integrated via wrappers that incorporate multi-threaded and pipelined behavior to the overall system simulation. 

Q8. What is the trade-off area for static profiling?

The trade-off area for static profiling is quite stretched, since it includes automated methods, such as function call graph extraction, as well as purely manual profiling phases, such as complexity analysis. 

Q9. What is the important factor in retaining the investment in a design?

In order to partly retain the investment in previous designs, the compatibility of software, or the computing infrastructure to the new design becomes important. 

Q10. What are some of the metric that are used in the domain of hardware-software partitioning?

HW-SW partitioning specific metrics: Metrics in the domain of hardware-software partitioning can be seen as a special case of affinity metrics with two design choices only. 

Q11. What are the advantages of a path-oriented walk?

Path-oriented walks may have the advantage of potentially reusing intermediate results of earlier design evaluations along the path. 

Q12. What are the main characteristics of preconfigured IP blocks?

Preconfigured IP-blocks can also be seen as architecture templates, revealing only design parameters to the designer that lead to feasible designs. 

Q13. What is the number of possible configurations for the overall system?

given n design parameters Pi, 0 ≤ i < n with Ci possible configurations each, the number of possible configurations C for the overall system is the product of all parameter configurationsC =n−1∏i=0Ci.