Journal ArticleDOI
Reliability challenges in 3D IC packaging technology
TLDR
This paper presents a projection of the reliability challenges in 3D IC packaging technology on the basis of what the authors have known from flip chip technology.About:
This article is published in Microelectronics Reliability.The article was published on 2011-03-01. It has received 493 citations till now. The article focuses on the topics: Reliability (semiconductor) & Packaging engineering.read more
Citations
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Journal ArticleDOI
Review and Projections of Integrated Cooling Systems for Three-Dimensional Integrated Circuits
TL;DR: In this article, the authors provide a vision for codesigning 3D IC architecture and integrated cooling systems and provide a new level of codesign approach with circuit, software and thermal designers working together.
Proceedings ArticleDOI
Assembly and reliability challenges in 3D integration of 28nm FPGA die on a large high density 65nm passive interposer
TL;DR: In this article, the authors describe the technical challenges associated with 3D integration of 100um thin interposer and FPGA die on to a package and stacked die package reliability.
Journal ArticleDOI
Recent advances on kinetic analysis of solder joint reactions in 3D IC packaging technology
King-Ning Tu,Yingxia Liu +1 more
TL;DR: In this article, the authors review five solder joint reactions in 3D IC packaging technology which are of wide interest: Scallop-type growth of Cu6Sn5 in solid-liquid interdiffusion reaction, Whisker type growth of Sn crystals at room temperature, layer-type intermetallic compound (IMC) growth in solid state aging, porous-type Cu3Sn in μ-bumps, and pillar-type growing of Cu/Sn IMC down to 1 μm in diameter.
Journal ArticleDOI
Micro/Nanoscale 3D Assembly by Rolling, Folding, Curving, and Buckling Approaches.
Xu Cheng,Yihui Zhang +1 more
TL;DR: The latest progress in the area of micro/nanoscale 3D assembly, covering the various classes of methods through rolling, folding, curving, and buckling assembly, is discussed, focusing on the design concepts, principles, and applications of different methods, followed by an outlook on the remaining challenges and open opportunities.
Journal ArticleDOI
Low-temperature direct copper-to-copper bonding enabled by creep on highly (1 1 1)-oriented Cu surfaces
TL;DR: In this article, the authors achieved low-temperature Cu-to-Cu direct bonding using highly (1 − 1 − 1)-orientated Cu films, which achieved a bonding temperature of 200°C at a stress of 114psi for 30 min at 10−3 −torr.
References
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Journal ArticleDOI
Nonlinear Thermal Stress/Strain Analyses of Copper Filled TSV (Through Silicon Via) and Their Flip-Chip Microbumps
TL;DR: In this article, the nonlinear thermal stresses and strains at the interfaces between the copper, silicon, and dielectric have been determined for a wide-range of aspect ratios (of the silicon thickness and the TSV diameter).
Journal ArticleDOI
Electromigration and Thermomigration in Pb-Free Flip-Chip Solder Joints
TL;DR: In this article, the authors review the unique features of EM and TM in flip-chip solder bumps, emphasizing the effects of current crowding and Joule heating on the dissolution rates of Ni and Cu.
Proceedings ArticleDOI
Nonlinear thermal stress/strain analyses of copper filled TSV (through silicon via) and their flip-chip microbumps
TL;DR: In this article, the nonlinear thermal stresses and strains at the interfaces between the copper, silicon, and dielectric have been determined for a wide-range of aspect ratios (of the silicon thickness and the TSV diameter).
Proceedings ArticleDOI
Through-silicon via and die stacking technologies for microsystems-integration
Eric Beyne,P. De Moor,Wouter Ruythooren,Riet Labie,Anne Jourdain,Harrie Tilmans,Deniz Sabuncuoglu Tezcan,Philippe Soussan,Bart Swinnen,R. Cartuyvels +9 more
TL;DR: In this paper, a novel 3D TSV and 3D stacking technologies are presented for heterogeneous integration of imaging devices, where each layer of the stack is realized using a different technology, which may include sensors, imagers, rf and MEMS technologies.
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