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Bibhash Sen
Researcher at National Institute of Technology, Durgapur
Publications - 91
Citations - 1157
Bibhash Sen is an academic researcher from National Institute of Technology, Durgapur. The author has contributed to research in topics: Quantum dot cellular automaton & Logic gate. The author has an hindex of 16, co-authored 78 publications receiving 886 citations. Previous affiliations of Bibhash Sen include National Institute of Engineering & Indian Institute of Engineering Science and Technology, Shibpur.
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Modular Design of testable reversible ALU by QCA multiplexer with increase in programmability
TL;DR: The experimentation establishes that the proposed RALU outperforms the conventional reversible ALU in terms of programming flexibility and testability and is able to achieve 100% fault tolerance in the presence of single missing or additional cell defects in QCA layout.
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Design of efficient full adder in quantum-dot cellular automata.
TL;DR: This work targets developing multi-layered full adder architecture in QCA framework based on five-input majority gate proposed here, and demonstrates the significant improvements in design level in terms of circuit area, cell count, and clock compared to that of conventional design approaches.
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Towards modular design of reliable quantum-dot cellular automata logic circuit using multiplexers
TL;DR: The Quantum dot Cellular Automata (QCA) can be such an architecture at nano-scale and thus emerges as a viable alternative for the current CMOS VLSI and its effectiveness is further established through synthesis of configurable logic block (CLB) for field programmable gate arrays (FPGAs).
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Efficient design of parity preserving logic in quantum-dot cellular automata targeting enhanced scalability in testing
TL;DR: The achievement of 100% stuck-at fault coverage and the 100% fault coverage for single missing/additional cell defects in QCA layout of the t-QCA gate, address the reliability issues of QCA nano-circuit design.
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Realizing Reversible Computing in QCA Framework Resulting in Efficient Design of Testable ALU
TL;DR: This work targets the design of reversible ALU (arithmetic logic unit) in QCA framework and proposes a new “Reversible QCA” (RQCA), which is established to be more effective than the existing ALU.