D
David Lewis
Researcher at University of Adelaide
Publications - 268
Citations - 9023
David Lewis is an academic researcher from University of Adelaide. The author has contributed to research in topics: Programmable logic device & Logic family. The author has an hindex of 51, co-authored 259 publications receiving 8330 citations. Previous affiliations of David Lewis include University of California, Berkeley & University of Sheffield.
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Journal ArticleDOI
Anaerobic digestion of algae biomass: A review
TL;DR: To consider the integration of anaerobic digestion into a commercial-scale integrated microalgae production and biofuel refinery facility or wastewater treatment plant, a review of the literature, the current state of the art and future directions for research is presented.
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Disruption of microalgal cells for the extraction of lipids for biofuels: Processes and specific energy requirements
TL;DR: An overview of microalgal cell disruption processes which are potentially suitable for large scale lipid extractions and the results show that further research and innovation is required for the sustainable cell disruption and lipid extraction from microalgae.
Journal ArticleDOI
Architecture of field-programmable gate arrays: the effect of logic block functionality on area efficiency
TL;DR: It was observed that the area efficiency of a logic block depends not only on its functionality but also on the average number of pins connected per logic block.
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Microbial flocculation, a potentially low-cost harvesting technique for marine microalgae for the production of biodiesel
TL;DR: The microalgae cells were not under stress and remained viable, thus potentially allowing media to be reused in large-scale processes without further treatment, and no metallic flocculants were required and the organic substrates are readily available.
Proceedings ArticleDOI
The Stratix II logic and routing architecture
David Lewis,Elias Ahmed,Gregg William Baeckler,Vaughn Betz,Mark Bourgeault,David Cashman,David Galloway,Michael D. Hutton,Christopher F. Lane,Andy L. Lee,Paul Leventis,Sandy Marquardt,Cameron McClintock,Ketan Padalia,Bruce B. Pedersen,Giles Powell,Boris Ratchev,Srinivas T. Reddy,Jay Schleicher,Kevin Stevens,Richard Yuan,Richard G. Cliff,Jonathan Rose +22 more
TL;DR: This architecture features a novel adaptive logic module (ALM) that is based on a 6-LUT, but can be partitioned into two smaller LUTs to efficiently implement circuits containing a range of LUT sizes that arises in conventional synthesis flows.