M
Michael Nicolaidis
Researcher at University of Grenoble
Publications - 231
Citations - 7006
Michael Nicolaidis is an academic researcher from University of Grenoble. The author has contributed to research in topics: Fault coverage & Built-in self-test. The author has an hindex of 40, co-authored 231 publications receiving 6801 citations. Previous affiliations of Michael Nicolaidis include Centre national de la recherche scientifique & STMicroelectronics.
Papers
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Journal ArticleDOI
Upset hardened memory design for submicron CMOS technology
TL;DR: In this article, a design technique for storage elements which are insensitive to radiation-induced single-event upsets is proposed for implementation in high density ASICs and static RAMs using submicron CMOS technology.
Proceedings ArticleDOI
Time redundancy based soft-error tolerance to rescue nanometer technologies
TL;DR: This work uses time redundancy techniques to derive low cost soft-error tolerant implementations for logic networks in response to the increased operating frequencies, geometry shrinking and power supply reduction that accompany the process of very deep submicron scaling.
Journal ArticleDOI
Design for soft error mitigation
TL;DR: Various SEU and SET mitigation schemes that could help the designer meet her or his goals are described.
Journal ArticleDOI
On-Line Testing for VLSI—A Compendium of Approaches
TL;DR: An overview of a comprehensive collection of on-line testing techniques for VLSI, avoiding complex fail-safe interfaces using discrete components; radiation hardened designs, avoiding expensive fabrication process such as SOI, etc.
BookDOI
Soft Errors in Modern Electronic Systems
TL;DR: In this article, the authors provide a comprehensive presentation of the most advanced research results and technological developments enabling understanding, qualifying and mitigating the soft errors effect in advanced electronics, including the fundamental physical mechanisms of radiation induced soft errors, the various steps that lead to a system failure, the modelling and simulation of soft error at various levels (including physical, electrical, netlist, event driven, RTL, and system level modeling and simulation), hardware fault injection, accelerated radiation testing and natural environment testing, soft error oriented test structures, process-level, device level, celllevel, circuit