S
Shinichi Takagi
Researcher at University of Tokyo
Publications - 695
Citations - 17480
Shinichi Takagi is an academic researcher from University of Tokyo. The author has contributed to research in topics: Electron mobility & MOSFET. The author has an hindex of 61, co-authored 651 publications receiving 16363 citations. Previous affiliations of Shinichi Takagi include National Institute of Advanced Industrial Science and Technology & Stanford University.
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On the universality of inversion layer mobility in Si MOSFET's: Part I-effects of substrate impurity concentration
TL;DR: In this paper, the inversion layer mobility in n-and p-channel Si MOSFETs with a wide range of substrate impurity concentrations (10/sup 15/ to 10/sup 18/ cm/sup -3/) was examined.
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Comparative study of phonon‐limited mobility of two‐dimensional electrons in strained and unstrained Si metal–oxide–semiconductor field‐effect transistors
TL;DR: In this paper, the authors investigated the phonon-limited mobility of strained Si metal-oxide-semiconductor field effect transistors (MOSFETs) through theoretical calculations including two-dimensional quantization.
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On the universality of inversion layer mobility in Si MOSFET's: Part II-effects of surface orientation
TL;DR: In this paper, the inversion layer mobilities in n-channel MOSFET's fabricated on Si wafers with three surface orientations were investigated from the viewpoint of the universal relationship against the effective field.
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Carrier-Transport-Enhanced Channel CMOS for Improved Power Consumption and Performance
Shinichi Takagi,T. Iisawa,Tsutomu Tezuka,T. Numata,Shu Nakaharai,N. Hirashita,Yoshihiko Moriyama,Koji Usuda,Eiji Toyoda,Sanjeewa Dissanayake,Masato Shichijo,Ryosho Nakane,Satoshi Sugahara,Mitsuru Takenaka,Naoharu Sugiyama +14 more
TL;DR: In this article, the authors reviewed the recent approaches in realizing carrier-transport-enhanced CMOS, and the critical issues, fabrication techniques, and device performance of MOSFETs using three types of channel materials, Si (SiGe) with uniaxial strain, Ge-on-insulator (GOI), and III-V semiconductors, are presented.
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Fabrication of strained Si on an ultrathin SiGe-on-insulator virtual substrate with a high-Ge fraction
TL;DR: In this article, a promising fabrication method for a Si1−xGex-on-insulator (SGOI) virtual substrate and evaluation of strain in the Si layer on this SGOI substrate are presented.