Daniel Brüderle

TL;DR: PyNN increases the productivity of neuronal network modelling by providing high-level abstraction, by promoting code sharing and reuse, and by providing a foundation for simulator-agnostic analysis, visualization and data-management tools.

TL;DR: This study presents a highly configurable neuromorphic computing substrate and uses it for emulating several types of neural networks, including a mixed-signal chip, which has been explicitly designed as a universal neural network emulator.

TL;DR: A methodological framework that meets novel requirements emerging from upcoming types of accelerated and highly configurable neuromorphic hardware systems and represents the basis for the maturity of the model-to-hardware mapping software is presented.

TL;DR: This work has developed a highly accelerated analog VLSI model of leaky integrate and fire neurons that incorporates fast and slow synaptic facilitation and depression mechanisms in its conductance based synapses.

TL;DR: This work introduces an accelerated neuromorphic hardware device and describes the implementation of the proposed concept for this system, based on the integration of the hardware interface into a simulator-independent language which allows for unified experiment descriptions that can be run on various simulation platforms without modification.