E
Emmanuel Vincent
Researcher at STMicroelectronics
Publications - 95
Citations - 1955
Emmanuel Vincent is an academic researcher from STMicroelectronics. The author has contributed to research in topics: Gate oxide & Oxide. The author has an hindex of 18, co-authored 93 publications receiving 1771 citations. Previous affiliations of Emmanuel Vincent include École nationale supérieure d'électronique et de radioélectricité de Grenoble.
Papers
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Journal ArticleDOI
Review on high-k dielectrics reliability issues
G. Ribes,J. Mitard,M. Denais,Sylvie Bruyere,Frederic Monsieur,Chittoor Parthasarathy,Emmanuel Vincent,Gerard Ghibaudo +7 more
TL;DR: In this article, the authors review the status of reliability studies of high-k gate dielectrics and try to illustrate it with experimental results, showing that the reliability of Hf-based materials is influenced both by the interfacial layer as well as the high k layer.
Proceedings ArticleDOI
Hot-Carrier acceleration factors for low power management in DC-AC stressed 40nm NMOS node at high temperature
TL;DR: In this article, a three mode interface trap generation is proposed based on the energy acquisition involved in distinct interactions in all the V GS, V DS (V BS ) conditions as a single I DS lifetime dependence is observed with V GD > 0.
Journal ArticleDOI
A thorough investigation of MOSFETs NBTI degradation
Vincent Huard,M. Denais,F. Perrier,Nathalie Revil,Chittoor Parthasarathy,Alain Bravaix,Emmanuel Vincent +6 more
TL;DR: An overview of evolution of transistor parameters under negative bias temperature instability stress conditions commonly observed in p-MOSFETs in recent technologies is presented and a physical model is proposed which could be used to more accurately predict the transistor degradation.
Proceedings ArticleDOI
A thorough investigation of progressive breakdown in ultra-thin oxides. Physical understanding and application for industrial reliability assessment
Frederic Monsieur,Emmanuel Vincent,David Roy,Sylvie Bruyere,J.C. Vildeuil,G. Pananakakis,Gerard Ghibaudo +6 more
TL;DR: In this paper, a close investigation of the gate oxide failure for thickness below 24/spl Aring was provided, and the wear-out beginning at the failure occurrence was studied.
Journal ArticleDOI
Improved method for the oxide thickness extraction in MOS structures with ultrathin gate dielectrics
TL;DR: In this article, an improved method for the assessment of the oxide thickness applicable to advanced CMOS technologies is proposed, which is a proper combination of Maserjian's technique and of Vincent's method.