J
Jeffrey Bokor
Researcher at University of California, Berkeley
Publications - 452
Citations - 24176
Jeffrey Bokor is an academic researcher from University of California, Berkeley. The author has contributed to research in topics: Extreme ultraviolet lithography & Extreme ultraviolet. The author has an hindex of 73, co-authored 440 publications receiving 21890 citations. Previous affiliations of Jeffrey Bokor include University of California & Intel.
Papers
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Journal ArticleDOI
FinFET-a self-aligned double-gate MOSFET scalable to 20 nm
Digh Hisamoto,Wen-Chin Lee,J. Kedzierski,Hideki Takeuchi,K. Asano,C. Kuo,Erik H. Anderson,Tsu-Jae King,Jeffrey Bokor,Chenming Hu +9 more
TL;DR: In this paper, a self-aligned double-gate MOSFET, FinFET was proposed by using boron-doped Si/sub 04/Ge/sub 06/ as a gate material.
Journal ArticleDOI
MoS2 transistors with 1-nanometer gate lengths
Sujay B. Desai,Sujay B. Desai,Surabhi R. Madhvapathy,Surabhi R. Madhvapathy,Angada B. Sachid,Angada B. Sachid,Juan Pablo Llinas,Juan Pablo Llinas,Qingxiao Wang,Geun Ho Ahn,Geun Ho Ahn,Gregory Pitner,Moon J. Kim,Jeffrey Bokor,Jeffrey Bokor,Chenming Hu,H.-S. Philip Wong,Ali Javey,Ali Javey +18 more
TL;DR: Molybdenum disulfide (MoS2) transistors with a 1-nm physical gate length using a single-walled carbon nanotube as the gate electrode are demonstrated, which exhibit excellent switching characteristics with near ideal subthreshold swing of ~65 millivolts per decade and an On/Off current ratio of ~106.
Proceedings ArticleDOI
FinFET scaling to 10 nm gate length
Bin Yu,Leland Chang,Shibly S. Ahmed,Haihong Wang,Scott A. Bell,Chih-Yuh Yang,Cyrus E. Tabery,Chau M. Ho,Qi Xiang,Tsu-Jae King,Jeffrey Bokor,Chenming Hu,Ming-Ren Lin,D. Kyser +13 more
TL;DR: In this paper, the authors report the design, fabrication, performance, and integration issues of double-gate FinFETs with the physical gate length being aggressively shrunk down to 10 nm and the fin width down to 12 nm.
Proceedings ArticleDOI
Sub 50-nm FinFET: PMOS
Xuejue Huang,Wen-Chin Lee,C. Kuo,D. Hisamoto,Leland Chang,J. Kedzierski,E. Anderson,Hideki Takeuchi,Yang-Kyu Choi,K. Asano,Vivek Subramanian,Tsu-Jae King,Jeffrey Bokor,Chenming Hu +13 more
TL;DR: In this article, a self-aligned double-gate MOSFET structure (FinFET) is used to suppress the short channel effect, and a 45 nm gate-length PMOS FinEET is presented.
Patent
Finfet transistor structures having a double gate channel extending vertically from a substrate and methods of manufacture
Chenming Hu,Tsu-Jae King,Vivek Subramanian,Leland Chang,Xuejue Huang,Yang-Kyu Choi,Jakub Tadeusz Kedzierski,Nick Lindert,Jeffrey Bokor,Wen-Chin Lee +9 more
TL;DR: In this article, a planar MOSFET is fabricated in a silicon layer overlying an insulating layer (e.g., SIMOX) with the device extending from the insulating layers as a fin.