C. Deldicque

TL;DR: The Compact Muon Solenoid (CMS) detector at the Large Hadron Collider (LHC) at CERN as mentioned in this paper was designed to study proton-proton (and lead-lead) collisions at a centre-of-mass energy of 14 TeV (5.5 TeV nucleon-nucleon) and at luminosities up to 10(34)cm(-2)s(-1)

TL;DR: The electronics of the First Level Global Trigger (GT) for the CMS experiment is described in this paper, which decides for every LHC bunch crossing whether to reject or to accept a physics event for further evaluation by the High Level Trigger.

TL;DR: The DAQ and Timing Hub (DTH) as mentioned in this paper is an ATCA (Advanced Telecommunications Computing Architecture) hub board intended for the phase-2 upgrade of the CMS experiment.

TL;DR: The Level-1 Data Scouting System (L1DS) as discussed by the authors is based on the Xilinx Ultrascale Plus series of FPGAs, capable of sophisticated feature searches with resolution often similar to the offline reconstruction.

TL;DR: In this paper , the authors present the architecture and current state of prototype firmware of the Level-1 Global Trigger, the final stage of the new Level 1 trigger for Phase-2 of the LHC.